PDP Lineage

From [email protected] Thu Jan 25 19:15:51 1990
Newsgroups: alt.folklore.computers
Subject: DEC's PDP family tree
From: [email protected] (Bob Devine)
Date: 22 Jan 90 23:05:44 GMT
Organization: Digital Equipment Corp. - Colorado Springs, CO.

In the beginning was the PDP-1 ...
PDP-1 = first commercial interactive computer; late 1960; had 18 bits, 6 bit op code
PDP-2 = a PDP-1 with another mem board, 24 bit design, never produced
PDP-3 = 36 bit design, singleton built by a DEC customer (Scientific Engineering Institute, Waltham, Massachusetts) in 1960. It finally was given to M.I.T., and eventually wound up in Oregon (1974).
PDP-4 = a modified PDP-1, 18 bit, 5 bit opcode so twice the address space of the PDP-1
PDP-5 = "first minicomputer" introduced in early 1963, 12 bit, 3 bit opcode (8 instructions)
PDP-6 = a 36-bit mainframe machine; came out in late 1964
PDP-7 = a modified PDP-4, 18 bit, introduced Gardner-Denver wirewrap backplanes and FlipChips
PDP-8 = successfully mass-produced follow-on to PDP-5, 12 bit; 1965
PDP-8/i,l = 12 bit improved PDP-8
PDP-8/e,f,m = 12 bit improved PDP-8/i with Omnibus architecture
PDP-9 = a modified version of the PDP-7 (it started life as a PDP-7/X), 18 bit. Its main advance over the PDP-7 was in the memory design.
PDP-9/l = 18 bit low cost PDP-9
PDP-10 = follow-on to PDP-6 using FlipChip technology, 36 bit mainframe; 1967
PDP-11 = an entire family of these 16-bitters was made, byte oriented, Unibus architecture; 1970
PDP-12 = a PDP-8/i merged with a LINC processor in single CPU, 12 bit
PDP-13 = no such machine!
PDP-14 = industrial computer, 12 bit programmable logic controller not compatible with PDP-8 family
PDP-15 = 18 bit, highly improved PDP-9, a whole family of computers (the PDP-15/10, /20, /30, /35, /40, /50, and /76). One of the first DEC computers to use ICs extensively. First PDP-15 shipped in February 1970.
PDP-16 = 1 bit Register Transfer Machine architecture ("build your own computer"), industrial computer
DECsystem-10 = 36 bit mainframe, next generation of the PDP-10
DECsystem-20 = 36 bit mainframe, third generation PDP-10; alternative microcode, OS, and different paint = DECsystem-10
VAX-11 = 32 bit, byte oriented

Following the PDP-16, DEC never introduced another system called a PDP-n. References to a "PDP-20" are a mistaken reference to the KL-10 based DEC-20.

DEC began moving away from the PDP-n name with the 2nd generation of the PDP-8 (8/i & 8/l), PDP-9/l, and the DECsystem-10, around 1971. By the time of the VAX-11, the move was complete.

The family tree goes something like this:
PDP-1 --> PDP-4 --> PDP-7 --> PDP-9 --> PDP-15
PDP-5 --> PDP-8 --> PDP-12
PDP-6 --> PDP-10 --> DECsystem-10 --> DECsystem-20
PDP-11 --> VAX

A good overview of the DEC family of computers can be found in the book "Computer Engineering - A DEC view of hardware systems design", by C. Gordon Bell, J. Craig Mudge, and John E. McNamara. It is published by Digital Press, ISBN 0-932376-00-2.

Entire PDP-8 instruction set

AND - Logical AND, octal value 0XXX
TAD - Two's complement Add, octal value 1XXX
ISZ - Increment and skip if zero, octal value 2XXX
DCA - Deposit and Clear Accumulator, octal value 3XXX
JMS - Jump to subroutine, octal value 4XXX
JMP - Jump to, octal value 5XXX
IO instructions to various devices - octal value 6XXX
Operate microinstructions - octal value 7xxx

From [email protected] Thu Jan 25 19:15:20 1990
Newsgroups: alt.folklore.computers
Subject: PDP-9T in DEC's heritage
From: [email protected] (Martin Taylor)
Date: 23 Jan 90 00:18:51 GMT
Reply-To: [email protected] (Martin Taylor)
Organization: D.C.I.E.M., Toronto, Canada
Summary: DEC's first memory mapped time-sharing machine

Brian Stuart gave a nice chart of the DEC family of computers:

Year  18-bitters     12-bitters         16-bitters                 36-bitters
1960    PDP-1 -------------------------------------------------------
          |                                                          \
1962    PDP-4 <--- LINC --------                                      \
1963      |        PDP-5   \    \                                      |
1964    PDP-7        |      \    \                                   PDP-6
1965      |        PDP-8 --\ |    \                                    |
1966      |        PDP-8/S LINC-8  |                                   |
1967      |          |       |     |                                 KA10
1968    PDP-9      PDP-8/I,L |     |                                   |
1969      |          |     PDP-12  |                                   |
1970    PDP-15       |           PDP-14  PDP-11(/20)                   |
1971      |        PDP-8/E                /   |  \                     |
1972    PDP-15/76  PDP-8/M        - PDP-11/05 | PDP-11/45 --         KI10
1973                 |           /   |    PDP-11/40  |      \          |
                     |          /    |         |     |       \         |
1975               PDP-8/A PDP-11/03 PDP-11/04 |     |    PDP-11/70  KL10
1976                 |            PDP-11/34    | PDP-11/55    |      KL20
1977               VT78              |    PDP-11/60           |
1978                              PDP-11/34C              VAX-11/780

but at least one is missing: the PDP-9T of 1967-8. This was, as far as I know, DEC's first memory mapping computer designed for real-time time-shared experiment control. (I know the PDP-1 was time-shared, after a fashion, but the 9T had proper separation of all address spaces, round-robin scheduling, and so forth).

The story is more or less as follows: DCIEM had been looking for a shared experiment controller, and I was considering whether we could modify a PDP-7 along the lines of the SDS-940 at Berkeley(? where Butler lampson was, if not Berkeley). DEC's Canadian salesman, Sy Lyle, took my proposal to Maynard, and came back with stories of this wonderful new super-PDP-7 on which we might try the idea if we could persuade the project manager, John Jones. So off I went to Maynard, on the way passing by Harvard Psych Department, where they were in the planning stage of buying 4 IBM 1800s for experiment control. There I got Dan Forsythe and Don Norman interested, and we all went to see John Jones in the old mill in Maynard. After a few minutes of my presentation, he asked us to wait while he called in his Chief Engineer, Larry Seligman, who listened for about 20 minutes. Jones asked him what he thought, and he said "I like it," so Jones said "We'll do it."

That's the kind of company I like.

So what happened? Harvard and DCIEM both bought one, but San Diego did not, and neither did anyone else. The Harvard and DCIEM machines were developed in parallel with the normal PDP-9, leapfrogging each other in the development of their time-sharing hardware. Seligman devised a neat instruction-mapping device that allowed individual users to have their own privileged instruction sets and enabled them to exercise direct control over their I/O devices (wild, for a fully protected real-time time-sharing machine; I often wonder why it was not ported to the PDP-11 along with the memory mapping scheme).

Unfortunately, in the middle of the PDP-9 development, Seligman went back to university, leaving the PDP-9 in the hands of a less imaginative Chief Engineer. The PDP-9 that Seligman designed was later built, and called the PDP-15 (at least many of the characteristics of the PDP-15 were those Seligman had specified for the PDP-9 but did not appear in the 9). As a result, the actual PDP-9T was not the clean machine that it should have been. DEC never produced any software for the 9T, and as far as I can gather, never tried to sell any other than the two development machines. But those two ran experimental psychology labs for over a decade, quite successfully.

The PDP-9 had an address space of 32K 18-bit words, but the mapped machine allowed 256K. The virtual machine seen by the users was identical to a normal PDP-9 except for the 256 extra instructions provided by Seligman's I/O mapping trick, some of which did virtual DMA for non-DMA devices, provided timing services, and the like (for real-time experiments). On the normal PDP-9, the user had to use a minimum of 8K because of the ADSS monitor, but on the 9T, the user could be as small as 2K, which was plenty for many experiments. Users were guaranteed a response to an interrupt within 10 msec, and usually got it within 2 msec (all in-core, there was no swapping), with as many as 10 real-time users. Scheduling was a round-robin with 1 msec frames.

The PDP-9T inspired two sharp characters from Harvard, Rob Strom and Bob Walton, to produce both software and theoretical studies of time sharing. Walton, in particular, devised a theory of guaranteed real-time time-sharing that was not put into practice (as far as I know) until perhaps 10 years later on the PDP-11/34 and 11/70, with our (DCIEM and Andyne Computing Ltd.) MASCOT modifications to the UNIX kernel. The software development for the machine was a joint project of Harvard Psych Department and DCIEM.

Fun Days, with a Fun Machine. I wish DEC were like that now!



Martin Taylor ([email protected] ...!uunet!dciem!mmt) (416) 635-2048
If the universe transcends formal methods, it might be interesting.
(Steven Ryan).


From "The PDP-11 FAQ" ftp://ftp.update.uu.se/pub/pdp11/faq

MODEL  DATE  PRICE     BITS  COMMENTS
=====  ====  ========  ====  =====
PDP-1  1960  $120,000  18    DEC's first computer
PDP-2            NA    24    Never built?
PDP-3                  36    One was built by a customer, none by DEC.
PDP-4  1962            18    Predecessor of the PDP-7.
PDP-5  1963   $27,000  12    The ancestor of the PDP-8.
PDP-6  1964  $120,000  36    A big computer; 23 built, most for MIT.
PDP-7  1965  ~$60,000  18    Widely used for real-time control.
PDP-8  1965   $18,500  12    The smallest and least expensive PDP.
PDP-9  1966   $35,000  18    An upgrade of the PDP-7.
PDP-10 1967  $186,500  36    A PDP-6 successor, great for timesharing.
PDP-11 1970   $10,800  16    DEC's first and only 16 bit computer.
PDP-12 1969   $27,900  12    A PDP-8 relative.
PDP-13           NA          Bad luck, there was no such machine.
PDP-14                       A ROM-based programmable controller.
PDP-15 1970   $16,500  18    A TTL upgrade of the PDP-9.
PDP-16 1972 $.8-$4,000 NA    8/16  A register-transfer module system.

Since then, the PDP-11 had 16 to 22 implementations, depending on how you count them, many with variants. The following attempts to briefly track the evolution and progression.

In 1969 the -11 family was projected as follows:

Model  CPU   Comments

11/20 KA11 Origin of the species 1x performance. 11/10 - .7 of the 11/20, technologically cost reduced 11/20 in MOS. [This obviously became the 11/05, 11/10] 11/30 KA11 [Seems to have been the same as an 11/20 packaged with a little more memory, etc. I believe this is what eventually became the 11/20 that actually shipped] 11/40 KB11 2x performance. 11/45 KB11 2x performance. [Seems to have been intended to be an 11/40 with MMU. [Looks like this became the 11/40 that eventually shipped.] 11/50 KC11 2x performance. Hardware floating point 32 bit processor. [I believe the 32 bit refers to the FPU!] 11/55 KC11 2x performance. With MMU. [It looks like the 11/50 plus 11/55 became the eventual 11/45] 11/65 KD11 4x performance. 32 bit separate memory bus, 32 bit processor.

PDP-11 Operating Systems

IOX
    An I/O library, on paper tape.
DOS-11
    Original DOS.
DOS/BATCH
    Later version of DOS with batch capabilities.
DOS V4
    Used to build RSTS-11 V4 in 1973, did not do batch.
    It was purely an interactive (single user) OS.
RSTS, RSTS/E
    Resource Sharing/Time Sharing. General purpose Time sharing system.
Micro-RSTS
    A packaged reduced version of RSTS/E.
CAPS-11
    Cassette Based Programme development System.
MUMPS-11
    Massachusetts General Hospital Multi-User Multi-Processing
    System.  A language, an operating system and a DBMS all in one.
    MUMPS-11 was later called DSM (DEC standard MUMPS).
RT-11
    Real Time. Foreground/Background or Single Job operating system. 
TSX-11
    Multiuser enhancements to RT-11 (third-party).
RSX-11
    Resource Sharing eXecutive. Multiprogramming system.
RSX-11/M
    Small to moderate-sized real-time multiprogramming system.
RSX-11/M+
    Extended RSX-11/M.
RSX-11/S
    Execute-only real-time multiprogramming system.
RSX-11/B, RSX-11/C
    Predecessors of RSX-11/D
RSX-11/D
    Large real-time multiprogramming system.
Micro/RSX
    A packaged/reduced version of RSX-11/M.
IAS
    Interactive Application System. Multi-purpose multiprogramming system.
    A derivative of RSX-11/D with (rudimentary) timesharing layered on top.
    The first version of RSX to include DCL (Digital Command Language).
P/OS
    A version of RSX-11/M+ targeted to DEC's PRO-325, PRO-350, and PRO-380 line of PDP-11-based personal computers.
    The DEC PRO was a PDP-11 (F-11 or J-11) with a different bus.┬While the bus supported DMA, none of the I/O cards used it.
    It also had a hard disk with programmed I/O and a single sector buffer.
TRAX
    Transaction Processing system.
    Developed by DEC but canceled around the time it was first shipped.
    It went to beta and might even have shipped a V1, but not for more than a few weeks.
Unix (tm)
    Much/most of Unix was developed on PDP-11s.
MERTS (MERTSS?)
    A virtual operating system that could run Unix as
    a process.  Several machines at BTL ran MERTS.
CTS-300
    There's some confusion as to whether this is just a re-packaged
    version of RT-11, or a time-sharing system layered on top of RT-11.
CTS-500
    A marketing label for a packaged version of RSTS with the OS plus various optional software items useful for commercial applications, perhaps DIBOL and/or COBOL.
TSX
    Time-sharing system layered on top of RT-11.
HT-11
    Heathkit's hacked version of RT-11, wouldn't run on a "real" PDP-11.
Ultrix
    Digital's implementation/port of BSD UNIX.
Venix
    A third-party implementation/port of UNIX.
MicroPower-Pascal
    A complete multithreaded bare metal RTOS.
    The development toolset ran on RT-11, but the target was bare metal.


The Embedded Muse Issue Number 414, January 18, 2021 http://www.ganssle.com/tem/tem414.html

The first completely-transistorized commercial computer was the, well, a lot of machines vie for credit and the history is a bit murky. Certainly by the mid-50s many became available. Earlier I claimed the Whirlwind was important at least because it spawned the SAGE machines. Whirlwind also inspired MIT's first transistorized computer, the 1956 TX-0, which had Whirlwind's 18 bit word. Ken Olsen, one of DEC's founders, was responsible for the TX-0's circuit design. DEC's first computer, the PDP-1, was largely a TX-0 in a prettier box. Throughout the 60s DEC built a number of different machines with the same 18 bit word. (DEC, or Digital Equipment Corporation, was a hugely important player in the minicomputer market during the '60s and '70s. They were acquired by Compaq, which in turn merged with HP).

The TX-0 was a fully parallel machine in an era where serial was common. (A serial computer works on a single bit at a time; modern parallel machines work on an entire word at once. Serial computing is slow but uses far fewer components.) Its 3600 transistors, at $200 a pop, cost about a megabuck. And all were enclosed in plug-in bottles, just like tubes, as the developers feared a high failure rate. But by 1974 after 49,000 hours of operation fewer than a dozen had failed.

The official biography of the machine (RLE Technical Report No. 627) contains tantalizing hints that the TX-0 may have had 100 vacuum tubes, and the 150 volt power supplies it describes certainly aligns with vacuum tube technology.

IBM's first transistorized computer was the 1958 7070. This was the beginning of the company's important 7000 series which dominated mainframes for a time. A variety of models were sold, with the 7094 for a time occupying the "fastest computer in the world" node. The 7094 used over 50,000 transistors. Operators would use another, smaller, computer to load a magnetic tape with many programs from punched cards, and then mount the tape on the 7094. We had one of these machines my first year in college. Operating systems didn't offer much in the way of security, and some of us figured out how to read the input tape and search for files with grades.

The largest 7000-series machine was the 7030 "Stretch," a $100 million (in today's dollars) supercomputer that wasn't super enough. It missed its performance goals by a factor of three, and was soon withdrawn from production. Only 9 were built. The machine had a staggering 169,000 transistors on 22,000 individual printed circuit boards. Interestingly, in a paper named The Engineering Design of the Stretch Computer, the word "millimicroseconds" is used in place of "nanoseconds."

While IBM cranked out their computing behemoths, small machines gained in popularity. Librascope's $16k ($118k today) LGP-21 had just 460 transistors and 300 diodes. It came out in 1963, the same year as DEC's $27k PDP-5. Two years later DEC produced the PDP-8, which was wildly successful, eventually selling some 300,000 units in many different models. Early units were assembled from hundreds of DEC's "flip chips," small PCBs that used diode-transistor logic with discrete transistors. A typical flip chip implemented three two-input NAND gates. Later PDP-8s used ICs; the entire CPU was eventually implemented on a single integrated circuit.

The market for computers remained relatively small till the PDP-8 brought prices to a more reasonable level, but the match of minis and ICs caused costs to plummet. By the late 60s everyone was building computers. Xerox. Raytheon (their 704 was possibly the ugliest computer ever built). Interdata. Multidata. Computer Automation. General Automation. Varian. SDS. Xerox. A complete list would fill a page. Minis created a new niche: the embedded system, though that name didn't surface for many years. Labs found that a small machine was perfect for controlling instrumentation, and you'd often find a rack with a built-in mini that was part of an experimenter's equipment.

The PDP-8/E was typical. Introduced in 1970, this 12 bit machine cost $6,500 ($38k today). Instead of hundreds of flip chips the machine used a few large PCBs with gobs of ICs to cut down on interconnects. Circuit density was just awful compared to today. The technology of the time was small scale ICs, each of which contained a couple of flip flops or a few gates, and medium scale integration. An example of the latter is the 74181 ALU which performed simple math and logic on a pair of four bit operands. Amazingly, TI still sells the military version of this part. It was used in many minicomputers, such as Data General's Nova line and DEC's seminal PDP-11.

The PDP-11 debuted in 1970 for about $11k with 4k words of core memory. Those who wanted a hard disk shelled out more: a 512KB disk with controller ran an extra $14k ($82k today). Today a terabyte disk drive runs about $50. If it had been possible to build such a drive in 1970, the cost would have been on the order of $100 million.

Experienced programmers were immediately smitten with the PDP-11's rich set of addressing modes and completely orthogonal instruction set. Most prior, and too many subsequent, ISAs were constrained by the costs and complexity of the hardware, and were awkward and full of special cases. A decade later IBM incensed many by selecting the 8088, whose instruction set was a mess, over the orthogonal 68000 which in many ways imitated the PDP-11.

Around 1990 I traded a case of beer for a PDP-11/70 which filled three tall racks, but eventually was unable to even give it away.

Minicomputers were used in embedded systems even into the 80s. We put a PDP-11 in a steel mill in 1983. It was sealed in an explosion-proof cabinet and interacted with Z80 microprocessors. The installers had for reasons unknown left a hole in the top of the cabinet. A window in the steel door let operators see the machine's controls and displays. I got a panicked 3 AM call one morning - someone had cut a water line in the ceiling. Not only were the computer's lights showing through the window - so was the water level. All of the electronics was submerged.


The Electrologica X1 was another of the first completely-transistorized commercial computers https://electrologica.nl/ https://en.wikipedia.org/wiki/Electrologica_X1

Edsger W. Dijkstra's 1968 paper on "The structure of the 'THE'-multiprogramming system" https://www.cs.utexas.edu/users/EWD/ewd01xx/EWD196.PDF for the Electrologica X8 (32K 27-bit words of core memory, 512K words of drum memory, indirect addressing, up to 48 channels for low speed I/O) https://en.wikipedia.org/wiki/Electrologica_X8 is archived at the University of Texas https://www.cs.utexas.edu/users/EWD/indexChron.html

THE is the "Technische Hogeschool Eindhoven" (Dutch for "Eindhoven University of Technology"). The THE batch multiprogramming system was the first to use semaphores and page-based virtual memory. https://en.wikipedia.org/wiki/THE_multiprogramming_system


https://groups.google.com/d/msg/comp.os.vms/DTStSTl3Vec/K0M3FXoqDgAJ

From Terry Kennedy

By the time the uV II and 86xx had come out, enough instruction traces had been gathered to prove the general "10% of the code is used 90% of the time" and a number of instruction subsets had been investigated, with microcode assist for VAX code implementation of the missing instructions.

That is also what caused (mostly*) the PDP-11 CIS options (11/23, 11/24, 11/44) to get dropped on later models - they implemented a superset of the VAX string, packed decimal, etc. instructions which were some of the first to be thrown overboard when the VAX architecture was subsetted. I think there's a couple of those instructions that were used frequently enough that they were retained even in the subsets.

* The late / slow / buggy nature of the J-11 chipset also didn't help. There were provisions for CIS microms on the underside of the ceramic carrier. But it seems DEC was "happy" enough to get chips that worked (although not at the original design speed**) that they abandoned CIS for both implementation difficulty and lack of usefulness reasons.

** The original top bin was 5Mhz with a 20MHz crystal. The fastest "official" J-11 speed was 18MHz. The support chipset DEC used didn't work*** at 20MHz, so that was dropped as a product goal. The PDP-11/93 and /94 CPU board (designed by ROI, sold by DEC) didn't use the DEC support chipset and didn't have those limitations. My "Report from the field (test)" DECUS Symposium presentation (arranged by DEC, not some massive non-disclosure violation by me) originally had benchmark results at 20, 24 and 26MHz (28MHz was flakey) but when I ran it by DEC I was politely asked to remove those if I didn't mind.

*** This was when PDP-11 related semiconductor fab was getting squeezed by VAX designs in the pipeline, leading to a raft of "it's broke, but we'll ship it anyway" silicon. The 2MB PMI memory board that didn't work in one of Unibus or Q-bus (I forget which) was another example that needed to wait a long time for fixed chips.


All VAX models 7xx, 8600/8650 had hardware PDP-11 compatibility mode.

Trivia - TECO was not rewritten in VAX assembler, so it carried its own PDP-11 support (or there was a magic exemption for it in the AME licensing, I forget which but think it was the former).

VSI folks might know if Itanium TECO is on Itanium emulating Alpha emulating VAX emulating PDP-11 8-}


https://groups.google.com/d/msg/comp.os.vms/DTStSTl3Vec/f5Z7Q5wsDgAJ

From Stephen Hoffman

The VAX-11 series systems have PDP-11 support in hardware. That's the VAX-11/725, VAX-11/730, VAX-11/750, VAX-11/751, VAX-11/780, VAX-11/782 (ASMP), VAX-11/785, the largely-hypothetical and rarely-seen VAX-11/787 (ASMP), and the VAX-11/790 series that was released as the VAX 8600 and a later upgrade was known as the VAX 8650 series.

VAX systems after the VAX-11 series do not have PDP-11 hardware support, and these VAX systems have PDP-11 support via emulation.

The MicroVAX series was the first subset VAX, IIIRC. It had less than what had been considered the full VAX instruction set. No MicroVAX had PDP-11 hardware support.

The last of the VMS V3.0 bits that were in compatibility mode included SYE error formatter tool, and a few other giblets. VMS V4.0 got rid of all of those, and moved PDP-11 support into the aforementioned layered product.

The Monitor Console Routine command verb MCR was something that I was working to remove from the OpenVMS documentation set years ago as the choices there were to either document and support MCR, or to work to expunge it from the documentation. MCR has some "interesting" behaviors, too. Removing references to MCR and other related references from the OpenVMS documentation happened when the particular OpenVMS manual was "open" for changes, and which wasn't all that often - if at all - for some of the OpenVMS manuals. Even back then. The more actively-updated manuals got most (all?) of the references to MCR expunged. No, there were no plans to remove the MCR command verb itself. That was to be left latent. Just to deprecate it, save for anyone that was still using the RSX compatibility mode product, or had existing uses in their code. And as I've commented before, the OpenVMS obsolete features manual was itself marked as obsolete. So there have been no updates made there in many years. And IIRC, the removal of MCR was after the obsolete-features manual was made obsolete.


https://groups.google.com/d/msg/comp.os.vms/DTStSTl3Vec/4HhfQs0xDgAJ

From Michael Moroney

The 7xx series technically included the 8600. It was originally to be the 790.

I don't think the 8650 ever had a 7xx number, unlikely. If it did, I'd guess it would be the VAX 795.


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